LimeSDR: Difference between revisions
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*'''[[LimeSDR-PCIe|LimeSDR-PCIe]]''' - SDR board with PCIe (1.0 x4) interface | *'''[[LimeSDR-PCIe|LimeSDR-PCIe]]''' - SDR board with PCIe (1.0 x4) interface | ||
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*'''[ | *'''[[LimeSDR-PCIe|LimeSDR-QPCIe]]''' - SDR board with PCIe (1.0 x4) interface and two LMS7002M transceivers | ||
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*'''[[LimeSDR GPIO Board]]''' - Expansion board that provides individually settable, bi-directional level-shifted I/O for FPGA GPIO 0-7 | *'''[[LimeSDR GPIO Board]]''' - Expansion board that provides individually settable, bi-directional level-shifted I/O for FPGA GPIO 0-7 | ||
{{Community}} | {{Community}} | ||
Revision as of 12:41, 15 March 2019
Family of LimeSDR Boards
Family of LimeSDR boards is a low cost, open source, apps-enabled software defined radio (SDR) platform that can be used to support just about any type of wireless communication standard. LimeSDR can send and receive UMTS, LTE, GSM, LoRa, Bluetooth, Zigbee, RFID, and Digital Broadcasting, to name but a few.
While most SDRs have remained in the domain of RF and protocol experts, LimeSDR is usable by anyone familiar with the idea of an app store - it’s the first SDR to integrate with Snappy Ubuntu Core. This means you can easily download new LimeSDR apps from developers around the world. If you’re a developer yourself, you can share and/or sell your LimeSDR apps through Snappy Ubuntu Core as well.
The LimeSDR platform gives students, inventors, and developers an intelligent and flexible device for manipulating wireless signals, so they can learn, experiment, and develop with freedom from limited functionality and expensive proprietary devices.
Here is a list and links to the related information of LimeSDR family boards:
- LimeSDR-Mini - SDR board with USB3 interface
- LimeSDR-USB - SDR board with USB3 interface
- LimeSDR-PCIe - SDR board with PCIe (1.0 x4) interface
- LimeSDR-QPCIe - SDR board with PCIe (1.0 x4) interface and two LMS7002M transceivers
- LimeSDR GPIO Board - Expansion board that provides individually settable, bi-directional level-shifted I/O for FPGA GPIO 0-7
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