Reference Development Kit: Difference between revisions

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===About===
The Reference Development Kit is comprised of three individual hardware devices: the [[#Myriad-RF 1|Myriad-RF 1]], the [[#DE0-Nano Interface Board|DE0-Nano Interface Board]], and the [[#Zipper Interface Board#|Zipper Interface Board]]. The Myriad-RF 1 communicates with one of these two boards via the [[#RFDIO Interface|Radio Frequency Digital Input Output (RFDIO)]] interface.
The Reference Development Kit is comprised of three individual hardware devices: the [[#Myriad-RF 1|Myriad-RF 1]], the [[#DE0-Nano Interface Board|DE0-Nano Interface Board]], and the [[#Zipper Interface Board#|Zipper Interface Board]]. The Myriad-RF 1 communicates with one of these two boards via the [[#RFDIO Interface|Radio Frequency Digital Input Output (RFDIO)]] interface.


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The [[Myriad-RF 1]] is a low cost universal radio development platform, based on flexible, multi standard LMS6002DFN transceiver and Altera FPGA module. It enables developers to implement their products for a wide variety of wireless communication applications efficiently. It is designed to be used with either the Digital Interface Board or the Zipper Interface Adapter.
The [[Myriad-RF 1]] is a low cost universal radio development platform, based on flexible, multi standard LMS6002DFN transceiver and Altera FPGA module. It enables developers to implement their products for a wide variety of wireless communication applications efficiently. It is designed to be used with either the Digital Interface Board or the Zipper Interface Adapter.


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===DE0-Nano Interface Board===
===DE0-Nano Interface Board===
[[File:DE0-Nano-Interface-Board-1.jpg|100px|thumb|left]]
[[File:DE0-Nano-Interface-Board-1.jpg|100px|thumb|left]]
The [[DE0-Nano Interface Board]] allows the Myriad-RF 1 to be connected to the [[DE0-Nano]] FPGA Development System, adding radio functionality to the system. It cannot be used with other FPGA development systems; for anything other than the DE0-Nano FPGA Development System, the [[#Zipper Interface Board|Zipper Interface Board]] should be used instead.
The [[DE0-Nano Interface Board]] allows the Myriad-RF 1 to be connected to the [[DE0-Nano]] FPGA Development System, adding radio functionality to the system. It cannot be used with other FPGA development systems; for anything other than the DE0-Nano FPGA Development System, the [[#Zipper Interface Board|Zipper Interface Board]] should be used instead.


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===Zipper Interface Board===
===Zipper Interface Board===
[[File:Zipper-1.jpg|100px|thumb|left]]
[[File:Zipper-1.jpg|100px|thumb|left]]
The [[Zipper Interface Board]] allows the Myriad-RF 1 to be connected to any FPGA development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards, adding radio functionality to the system. The multi-platform compatibility of the Zipper Interface Board makes it suitable for a wide range of FPGA development systems from manufacturers including Altera and Xilinx.
The [[Zipper Interface Board]] allows the Myriad-RF 1 to be connected to any FPGA development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards, adding radio functionality to the system. The multi-platform compatibility of the Zipper Interface Board makes it suitable for a wide range of FPGA development systems from manufacturers including Altera and Xilinx.


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===RFDIO Interface===
===RFDIO Interface===
[[File:RFDIO-Card-Connector-1.jpg|100px|thumb|left]]
[[File:RFDIO-Card-Connector-1.jpg|100px|thumb|left]]
The [[RFDIO]] Interface provides high-speed connectivity to FPGA-based carrier boards, including the [[#Digital Interface Board|Digital Interface Board]] and the [[#Zipper Interface Board#|Zipper Interface Board]] of the Reference Development Kit. It is based on the Hirose 0.5mm-pitch, 80-position surface-mount connector, and ensures interoperability between carrier boards and RF cards. The femail connector is located on the motherboard, while the male connector is located on the daughterboard.
The [[RFDIO]] Interface provides high-speed connectivity to FPGA-based carrier boards, including the [[#Digital Interface Board|Digital Interface Board]] and the [[#Zipper Interface Board#|Zipper Interface Board]] of the Reference Development Kit. It is based on the Hirose 0.5mm-pitch, 80-position surface-mount connector, and ensures interoperability between carrier boards and RF cards. The femail connector is located on the motherboard, while the male connector is located on the daughterboard.


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===See Also===
===See Also===
* [[Myriad-RF 1]]
* [[Myriad-RF 1]]

Revision as of 15:13, 13 July 2015

About

The Reference Development Kit is comprised of three individual hardware devices: the Myriad-RF 1, the DE0-Nano Interface Board, and the Zipper Interface Board. The Myriad-RF 1 communicates with one of these two boards via the Radio Frequency Digital Input Output (RFDIO) interface.

Myriad-RF 1

The Myriad-RF 1 is a low cost universal radio development platform, based on flexible, multi standard LMS6002DFN transceiver and Altera FPGA module. It enables developers to implement their products for a wide variety of wireless communication applications efficiently. It is designed to be used with either the Digital Interface Board or the Zipper Interface Adapter.

DE0-Nano Interface Board

The DE0-Nano Interface Board allows the Myriad-RF 1 to be connected to the DE0-Nano FPGA Development System, adding radio functionality to the system. It cannot be used with other FPGA development systems; for anything other than the DE0-Nano FPGA Development System, the Zipper Interface Board should be used instead.

Zipper Interface Board

The Zipper Interface Board allows the Myriad-RF 1 to be connected to any FPGA development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards, adding radio functionality to the system. The multi-platform compatibility of the Zipper Interface Board makes it suitable for a wide range of FPGA development systems from manufacturers including Altera and Xilinx.

RFDIO Interface

The RFDIO Interface provides high-speed connectivity to FPGA-based carrier boards, including the Digital Interface Board and the Zipper Interface Board of the Reference Development Kit. It is based on the Hirose 0.5mm-pitch, 80-position surface-mount connector, and ensures interoperability between carrier boards and RF cards. The femail connector is located on the motherboard, while the male connector is located on the daughterboard.

See Also