LimeSDR-USB RISC-V: Difference between revisions
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''Stub page' | ''Stub page.'' | ||
This project addresses the need for the LimeSDR project to have an full open-source FPGA firmware, which includes replacing it’s proprietary NIOS II softcore CPU to a RISC V implementation and adapting the system to a FuseSoC-based development flow. | This project addresses the need for the LimeSDR project to have an full open-source FPGA firmware, which includes replacing it’s proprietary NIOS II softcore CPU to a RISC V implementation and adapting the system to a FuseSoC-based development flow. | ||
{{Community}} | {{Community}} |
Latest revision as of 15:42, 23 May 2017
Stub page.
This project addresses the need for the LimeSDR project to have an full open-source FPGA firmware, which includes replacing it’s proprietary NIOS II softcore CPU to a RISC V implementation and adapting the system to a FuseSoC-based development flow.
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