Zipper Interface Board: Difference between revisions
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===About=== | ===About=== | ||
[[File:Zipper-1.jpg|center|550px|Zipper Interface Board, top]] | |||
The Zipper Interface Board is designed to allow any Field-Programmable Gate Array (FPGA) development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards to be connected to the [[Myriad-RF 1]] to form the [[Reference Development Kit]]. The combination of the Zipper and Myriad-RF 1 boards provides a low-cost universal radio development platform, based on the flexible, multi-standard Field Programmable Radio Frequency (FPRF) LMS6002D device. It enables developers to implement their products for a wide variety of wireless communication applications efficiently. | The Zipper Interface Board is designed to allow any Field-Programmable Gate Array (FPGA) development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards to be connected to the [[Myriad-RF 1]] to form the [[Reference Development Kit]]. The combination of the Zipper and Myriad-RF 1 boards provides a low-cost universal radio development platform, based on the flexible, multi-standard Field Programmable Radio Frequency (FPRF) LMS6002D device. It enables developers to implement their products for a wide variety of wireless communication applications efficiently. | ||
=== | ===Block diagram=== | ||
[[File:Zipper-Block-Diagram.jpg|center|550px|Zipper Interface Board block diagram]] | |||
File:Zipper-Block-Diagram.jpg|Zipper Interface Board block diagram | |||
===Connections=== | ===Connections=== | ||
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File:Zipper-Interface-Board-Schematics-8.png|ADF4002 | File:Zipper-Interface-Board-Schematics-8.png|ADF4002 | ||
</gallery> | </gallery> | ||
===Licensing=== | |||
====Hardware==== | |||
The hardware designs are licensed under a [https://creativecommons.org/licenses/by/3.0/ Creative Commons Attribution 3.0 Unported] licence. | |||
====Firmware==== | |||
The firmware is licensed under the [https://www.gnu.org/licenses/gpl-3.0.en.html GNU General Public Licence, Version 3]. Please note that third-party dependencies and modules may have their own licensing requirements. | |||
===See Also=== | ===See Also=== | ||
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* [[Zipper Interface Board Connections]] | * [[Zipper Interface Board Connections]] | ||
* [https://myriadrf.org/projects/rdk/ Reference Development Kit Project Page] | * [https://myriadrf.org/projects/rdk/ Reference Development Kit Project Page] | ||
{{Community}} | |||
Latest revision as of 15:05, 15 September 2015
About
The Zipper Interface Board is designed to allow any Field-Programmable Gate Array (FPGA) development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards to be connected to the Myriad-RF 1 to form the Reference Development Kit. The combination of the Zipper and Myriad-RF 1 boards provides a low-cost universal radio development platform, based on the flexible, multi-standard Field Programmable Radio Frequency (FPRF) LMS6002D device. It enables developers to implement their products for a wide variety of wireless communication applications efficiently.
Block diagram
Connections
The Zipper Interface Board features numerous on-board connections, in addition to those available on the Myriad-RF 1 itself. A full list of available connections is available on the page Zipper Interface Board Connections.
Schematics
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Data interface connector
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HSMC & pin header connectors
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FMC connector
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Clock generator
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Power supply
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Buffers
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Microcontroller
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ADF4002
Licensing
Hardware
The hardware designs are licensed under a Creative Commons Attribution 3.0 Unported licence.
Firmware
The firmware is licensed under the GNU General Public Licence, Version 3. Please note that third-party dependencies and modules may have their own licensing requirements.
See Also
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