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Difference between revisions of "LimeSDR-PCIe"

(Documentation)
(Board Design Files)
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== Board Design Files ==
 
== Board Design Files ==
  
Here are links to the schematic, PCB project and BOM:
+
Here are links to the schematic, PCB project and BOM.
* LimeSDR-PCIe v1.2 [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v2/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v2/LimeSDR-PCIe_1v2_schematic_r2.PDF Schematic (PDF)]
+
* LimeSDR-PCIe v1.2 [https://github.com/myriadrf/LimeSDR-PCIe/tree/master/hardware/1v2/EDA PCB project (Altium project)]
+
* LimeSDR-PCIe v1.2 [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v2/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v2/BOM/LimeSDR-PCIe_1v2_BOMr2.xls BOM (XLS)]
+
  
* LimeSDR-PCIe v1.3 [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v3/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v3/LimeSDR-PCIe_1v3_schematic_r0.PDF Schematic (PDF)]
+
'''LimeSDR-PCIe v1.2''':
* LimeSDR-PCIe v1.3 [https://github.com/myriadrf/LimeSDR-PCIe/tree/master/hardware/1v3/EDA PCB project (Altium project)]
+
* [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v2/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v2/LimeSDR-PCIe_1v2_schematic_r2.PDF Schematic (PDF)]
* LimeSDR-PCIe v1.3 [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v3/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v3/BOM/LimeSDR-PCIe_1v3_BOMr2.xls BOM (XLS)]
+
* [https://github.com/myriadrf/LimeSDR-PCIe/tree/master/hardware/1v2/EDA PCB project (Altium project)]
 +
* [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v2/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v2/BOM/LimeSDR-PCIe_1v2_BOMr2.xls BOM (XLS)]
 +
 
 +
 
 +
'''LimeSDR-PCIe v1.3''':
 +
* [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v3/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v3/LimeSDR-PCIe_1v3_schematic_r0.PDF Schematic (PDF)]
 +
* [https://github.com/myriadrf/LimeSDR-PCIe/tree/master/hardware/1v3/EDA PCB project (Altium project)]
 +
* [https://github.com/myriadrf/LimeSDR-PCIe/blob/master/hardware/1v3/EDA/Project%20Outputs%20for%20LimeSDR-PCIe_1v3/BOM/LimeSDR-PCIe_1v3_BOMr2.xls BOM (XLS)]
  
 
== Additional Components ==
 
== Additional Components ==

Revision as of 14:29, 28 February 2018

1 LimeSDR-PCIe Boards

LimeSDR-PCIe v1.3

2 Features and Specifications

Feature Description
RF Transceiver Lime Microsystems LMS7002M MIMO FPRF
FPGA Cyclone IV GX (EP4CGX30CF23C7N)
PCI Express x4 (4 lanes)
Oscillator Rakon @ 30.72MHz
Continuous frequency range 100 kHz – 3.8 GHz
Bandwidth 61.44MHz
RF connection 10 U.FL connectors (6 RX, 4 TX)
Power Output (CW) Up to 10dBm
Multiplexing 2×2 MIMO
Power Supply Via PCIe connector or optional external power supply
Status indicators Programmable LEDs
Dimensions 68,9mm x 136,85mm

3 Getting Help

If you have questions, the MyriadRF Discourse is a best place to ask for help.

4 Documentation

5 Software

6 FPGA Binary

Here are the link to FPGA gateware (bitstream):

7 Board Design Files

Here are links to the schematic, PCB project and BOM.

LimeSDR-PCIe v1.2:


LimeSDR-PCIe v1.3:

8 Additional Components

Here is a list of additional components to be used with LimeSDR-PCIe board.