Novena-RF: Difference between revisions

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===About===
===About===
[[File:Novena-RF.jpg|center|550px|Novena-RF board]]
The Novena-RF module is based on the original [[Myriad-RF 1]] design and has been adapted for use with the [http://www.kosagi.com/w/index.php?title=Novena_Main_Page Novena] open hardware computing platform, which can be configured for embedded applications and as an all-in-one desktop or a laptop.
The Novena-RF module is based on the original [[Myriad-RF 1]] design and has been adapted for use with the [http://www.kosagi.com/w/index.php?title=Novena_Main_Page Novena] open hardware computing platform, which can be configured for embedded applications and as an all-in-one desktop or a laptop.


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===Connections===
===Connections===
<gallery>
[[File:Novena-RF-Connector.jpg|center|550px|Novena-RF connector]]
File:Novena-RF-Connector.jpg|Novena-RF connector
</gallery>


===Schematics===
===Schematics===

Revision as of 14:01, 29 July 2015

About

Novena-RF board
Novena-RF board

The Novena-RF module is based on the original Myriad-RF 1 design and has been adapted for use with the Novena open hardware computing platform, which can be configured for embedded applications and as an all-in-one desktop or a laptop.

Images

Specifications

Transceiver LMS6002D
RF Bandwidth (BW) 300 MHz to 3800 MHz
Baseband Bandwidth (BW) Programmable (16 selections:; 0.75 – 14 MHz, Bypass mode
RF Module Control Via Serial Peripheral Interface (SPI)
Clock TCXO and option for Novena to supply the interface clock
RF Connectors U.FL micro-coax to bulkhead SMA on Novena port farm

Connections

Novena-RF connector
Novena-RF connector

Schematics

Driver

A complete software defined radio (SDR) driver for the Novena-RF module is available via GitHub. For more information on the use of this driver, see the Novena-RF Driver page.

Licensing

Hardware

The hardware designs are licensed under a Creative Commons Attribution 3.0 Unported licence.

Gateware

The FPGA RTL is licensed under the Apache License, Version 2.0. However, please note that this does not extend to any files provided with the Xilinx design tools; see the relevant files for the associated terms and conditions.

See Also