LimeSDR-PCIe: Difference between revisions

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== FPGA Binary ==
== FPGA Binary ==


Here are the links to pre-compiled MCU firmware and FPGA gateware (bitstream):
Here are the link to FPGA gateware (bitstream):
* USB3 MCU [https://github.com/myriadrf/LimeSDR-PCIe_FX3/blob/master/Debug/LimeSDR-PCIe_fx3_fw.img firmware]
* FPGA [https://github.com/myriadrf/LimeSDR-PCIe_GW/blob/master/output_files/LimeSDR-PCIe_lms7_trx_HW_1.4.rbf gateware]


* LimeSDR-PCIe v1.2 [https://github.com/myriadrf/LimeSDR-PCIe_GW/tree/HW_v1.2 gateware project]
* LimeSDR-PCIe v1.3 [https://github.com/myriadrf/LimeSDR-PCIe_GW gateware project]


== Board Design Files ==
== Board Design Files ==

Revision as of 12:40, 26 February 2018

LimeSDR-PCIe Boards

LimeSDR-PCIe
LimeSDR-PCIe

Features and Specifications

Feature Description
RF Transceiver Lime Microsystems LMS7002M MIMO FPRF
FPGA Cyclone IV GX (EP4CGX30CF23C7N)
PCI Express x4 (4 lanes)
Oscillator Rakon @ 30.72MHz
Continuous frequency range 100 kHz – 3.8 GHz
Bandwidth 61.44MHz
RF connection 10 U.FL connectors (6 RX, 4 TX)
Power Output (CW) Up to 10dBm
Multiplexing 2×2 MIMO
Power Supply Via PCIe connector or optional external power supply
Status indicators Programmable LEDs
Dimensions 68,9mm x 136,85mm

Getting Help

If you have questions, the MyriadRF Discourse is a best place to ask for help.

Documentation

Software

FPGA Binary

Here are the link to FPGA gateware (bitstream):

Board Design Files

Here are links to the schematic, PCB project and BOM:

Additional Components

Here is a list of additional components to be used with LimeSDR-PCIe board.