LMS6002 Pmod

Democratising Wireless Innovation
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About

The LMS6022 Pmod is a project to explore the usage of an LMS6002 chip over Digilent's Pmod interface.

The Pmod interface is a very simple interface:

- It has eight I/O pins, plus 3.3V and GND
- The speed is limited to some medium speed around 25-50 MHz

To exchange I/Q samples with the LMS6002 it is therefore necessary to multiplex and serialize the data, which limits the overall capabilities to a few MSamples/s. The actual pin level protocol is yet undecided and we will explore it with the final design.

To make the protocol between the Pmod host board and the LMS6002 configurable and to be as flexible as possible, the Pmod will employ a small ICE40 FPGA from Lattice. This can be programmed with the entire open source tool flow of Clifford Wolf (Project IceStorm).

Version 1

In the first version, the board will not have the actual LMS6002, but instead use the connector for the reference board.

The following components are on the board:

- One ICE40 FPGA - One PCB mounted Pmod connector - One breakout Pmod connector - JTAG headers for programming the FPGA - One connector for the MyriadRF reference board