Zipper Interface Board

Democratising Wireless Innovation
Revision as of 13:52, 24 July 2015 by Ghalfacree (talk | contribs) (Added licensing information.)
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About

The Zipper Interface Board is designed to allow any Field-Programmable Gate Array (FPGA) development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards to be connected to the Myriad-RF 1 to form the Reference Development Kit. The combination of the Zipper and Myriad-RF 1 boards provides a low-cost universal radio development platform, based on the flexible, multi-standard Field Programmable Radio Frequency (FPRF) LMS6002D device. It enables developers to implement their products for a wide variety of wireless communication applications efficiently.

Images

  • Zipper Interface Board, top

    Zipper Interface Board, top

  • Zipper Interface Board block diagram

    Zipper Interface Board block diagram

Connections

The Zipper Interface Board features numerous on-board connections, in addition to those available on the Myriad-RF 1 itself. A full list of available connections is available on the page Zipper Interface Board Connections.

Schematics

  • Data interface connector

    Data interface connector

  • HSMC & pin header connectors

    HSMC & pin header connectors

  • FMC connector

    FMC connector

  • Clock generator

    Clock generator

  • Power supply

    Power supply

  • Buffers

    Buffers

  • Microcontroller

    Microcontroller

  • ADF4002

    ADF4002

Licensing

Hardware

The hardware designs are licensed under a Creative Commons Attribution 3.0 Unported licence.

Firmware

The firmware is licensed under the GNU General Public Licence, Version 3. Please note that third-party dependencies and modules may have their own licensing requirements.

See Also

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