LimeSDR-Mini v1.1 hardware description: Difference between revisions

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== LimeSDR-Mini Board Key Features ==
 
The LimeSDR-Mini  is low-cost  software defined radio board. LimeSDR-Mini development board provides a hardware platform for developing and prototyping high-performance and logic-intensive digital and RF designs using Intel’s MAX 10 FPGA and Lime Microsystems transceiver.
 
[[File:LimeSDR-Mini_v1.1.png|center|550px|LimeSDR-Mini v1.1 ]]
 
LimeSDR-Mini board features:
 
* '''USB 3.0 controller: FTDI FT601'''
* '''FPGA: Intel MAX 10 (10M16SAU169C8G 169-UBGA)'''
** 169-pin FBGA package
** 16 K LE
** 549 Kb M9K Memory
** 2368 Kb User Flash Memory
** 1x fractional phase locked loops (PLLs)
** 45x 18x18-bit multipliers
** 130x general purpose input/output (GPIO)
** Single supply
** Flash feature
** FPGA configuration via JTAG
* '''RF transceiver: Lime Microsystems LMS7002M'''
* '''EEPROM Memory: 2x 128Kb EEPROMs for LMS MCU firmware and FPGA data'''
* '''FLASH Memory: 4Mb Flash memory for FPGA data'''
* '''Temperature sensor (unpopulated)'''
* '''General user inputs/outputs:'''
** 1x Dual colour (RG) LED
** 8x + 2x FPGA GPIO pinheader (3.3V)
* '''Connections:'''
** USB3.0 (type A) plug
** Coaxial RF (SMA female) connectors
** FPGA GPIO headers (unpopulated)
** FPGA JTAG connector (unpopulated)
** FAN (5V or 3.3V) connector
* '''Clock system:'''
** 40.00MHz onboard VCTCXO
** Possibility to trim VCTCXO by onboard DAC
** Reference clock input and output connectors (U.FL)
* '''Board size: 69mm x 31.4mm'''
 
For more information on the following topics, refer to the respective documents:
* '''FTDI FT601 USB 3.0 to FIFO Bridge datasheet [link]'''
* '''MAX 10 FPGA device family, refer to MAX 10 Device Handbook [link] '''
* '''LMS7002M transceiver resources [link]'''
 
== Board Overview ==
 
This section contains component location description on the board. LimeSDR-Mini board picture with highlighted connectors and main components is presented in Figure 2 and Figure 3.
 
[[File:LimeSDR-Mini_v1.1_top_componens.png|center|550px|LimeSDR-Mini v1.1 board top connectors and main components ]]
 
[[File:LimeSDR-Mini_v1.1_bot_componens.png|center|550px|Figure 3 LimeSDR-Mini v1.1 board bottom connectors and main componentsc ]]
 
Board components description listed in the Table 1 and Table 2.
 
{| class="wikitable"
|+ Table 1. Board components
! colspan="3"|Featured Devices
|-
! Board reference !! Type !! Description
|-
| IC1 || FPRF || Field programmable RF transceiver, LMS7002M
|-
| IC5 || FPGA || Intel MAX 10 (10M16SAU169C8G 169-UBGA)
|-
| IC6 || USB 3.0 microcontroller || Intel MAX 10 (10M16SAU169C8G 169-UBGA)
|-
! colspan="3"|Miscellaneous devices onboard
|-
| IC9 || IC || Quad SPDT switch, TS3A5018PW
|-
| IC6 || IC || Temperature sensor, LM75
|-
| IC19 || IC || SPI to I²C bridge, SC18IS602BIPW (not mounted)
|-
| IC17 || IC || I²C port expander with 4 push-pull outputs and 4 inputs, MAX7322ATE+
|-
! colspan="3"|Configuration, Status and Setup Components
|-
| IC9 || IC || Quad SPDT switch, TS3A5018PW
|-
| R51, R52, R53, R54, R56, R57, R59, R60 || 0 Ohm resistor || FPGA (IC31) MSEL[3:0]. Default mode: Active Serial Standard configuration
|-
| R115, R116, R117 || 10 kOhm resistor || USB3.0 microcontroller (IC13) boot configuration (PMODE0[2:0]) resistors. Default mode: SPI boot, On Failure - USB Boot
|-
| R125, R127, R128 || 10 kOhm resistor || USB3.0 microcontroller (IC13) crystal/clock frequency selection (FSLC[2:0]) resistors. Default mode: 19.2MHz crystal
|-
| J16 || JTAG chain pin header || USB3.0 (IC6) microcontroller’s debugging pin header, 0.05” pitch
|-
| J17, R122 || Pin header || USB3.0 microcontroller boot source (Flash memory or USB), 0.05” pitch jumper or 0402 0R resistor. In normal operation jumper or resistor must be placed.
|-
| SW1 || Push-button || USB3.0 microcontroller reset button
|-
| J11 || JTAG chain pin header || FPGA programming pin header for Altera USB-Blaster download cable, 0.05” pitch
|-
| LEDS1 || Red-green status LEDs || User defined FPGA indication LED1 (near board edge if SMD; on the bottom if through-hole), User defined FPGA indication LED2 (farther board edge if SMD; on the top if through-hole)
|-
| LEDS2 || Red-green status LEDs || FX3 (USB) status indication LED (near board edge if SMD; on the bottom if through-hole), board power indication LED (farther board edge if SMD; on the top if through-hole)
|-
! colspan="3"|General User Input/Output
|-
| J12 || Pin header || 8 FPGA GPIOs, 0.05” pitch
|-
| J13, J14 || Pin header || 3.3V fan connection pin headers, 0.1” and 0.05” pitch respectively
|}

Revision as of 06:29, 20 February 2018

LimeSDR-Mini Board Key Features

The LimeSDR-Mini is low-cost software defined radio board. LimeSDR-Mini development board provides a hardware platform for developing and prototyping high-performance and logic-intensive digital and RF designs using Intel’s MAX 10 FPGA and Lime Microsystems transceiver.

LimeSDR-Mini v1.1
LimeSDR-Mini v1.1

LimeSDR-Mini board features:

  • USB 3.0 controller: FTDI FT601
  • FPGA: Intel MAX 10 (10M16SAU169C8G 169-UBGA)
    • 169-pin FBGA package
    • 16 K LE
    • 549 Kb M9K Memory
    • 2368 Kb User Flash Memory
    • 1x fractional phase locked loops (PLLs)
    • 45x 18x18-bit multipliers
    • 130x general purpose input/output (GPIO)
    • Single supply
    • Flash feature
    • FPGA configuration via JTAG
  • RF transceiver: Lime Microsystems LMS7002M
  • EEPROM Memory: 2x 128Kb EEPROMs for LMS MCU firmware and FPGA data
  • FLASH Memory: 4Mb Flash memory for FPGA data
  • Temperature sensor (unpopulated)
  • General user inputs/outputs:
    • 1x Dual colour (RG) LED
    • 8x + 2x FPGA GPIO pinheader (3.3V)
  • Connections:
    • USB3.0 (type A) plug
    • Coaxial RF (SMA female) connectors
    • FPGA GPIO headers (unpopulated)
    • FPGA JTAG connector (unpopulated)
    • FAN (5V or 3.3V) connector
  • Clock system:
    • 40.00MHz onboard VCTCXO
    • Possibility to trim VCTCXO by onboard DAC
    • Reference clock input and output connectors (U.FL)
  • Board size: 69mm x 31.4mm

For more information on the following topics, refer to the respective documents:

  • FTDI FT601 USB 3.0 to FIFO Bridge datasheet [link]
  • MAX 10 FPGA device family, refer to MAX 10 Device Handbook [link]
  • LMS7002M transceiver resources [link]

Board Overview

This section contains component location description on the board. LimeSDR-Mini board picture with highlighted connectors and main components is presented in Figure 2 and Figure 3.

LimeSDR-Mini v1.1 board top connectors and main components
LimeSDR-Mini v1.1 board top connectors and main components
Figure 3 LimeSDR-Mini v1.1 board bottom connectors and main componentsc
Figure 3 LimeSDR-Mini v1.1 board bottom connectors and main componentsc

Board components description listed in the Table 1 and Table 2.

Table 1. Board components
Featured Devices
Board reference Type Description
IC1 FPRF Field programmable RF transceiver, LMS7002M
IC5 FPGA Intel MAX 10 (10M16SAU169C8G 169-UBGA)
IC6 USB 3.0 microcontroller Intel MAX 10 (10M16SAU169C8G 169-UBGA)
Miscellaneous devices onboard
IC9 IC Quad SPDT switch, TS3A5018PW
IC6 IC Temperature sensor, LM75
IC19 IC SPI to I²C bridge, SC18IS602BIPW (not mounted)
IC17 IC I²C port expander with 4 push-pull outputs and 4 inputs, MAX7322ATE+
Configuration, Status and Setup Components
IC9 IC Quad SPDT switch, TS3A5018PW
R51, R52, R53, R54, R56, R57, R59, R60 0 Ohm resistor FPGA (IC31) MSEL[3:0]. Default mode: Active Serial Standard configuration
R115, R116, R117 10 kOhm resistor USB3.0 microcontroller (IC13) boot configuration (PMODE0[2:0]) resistors. Default mode: SPI boot, On Failure - USB Boot
R125, R127, R128 10 kOhm resistor USB3.0 microcontroller (IC13) crystal/clock frequency selection (FSLC[2:0]) resistors. Default mode: 19.2MHz crystal
J16 JTAG chain pin header USB3.0 (IC6) microcontroller’s debugging pin header, 0.05” pitch
J17, R122 Pin header USB3.0 microcontroller boot source (Flash memory or USB), 0.05” pitch jumper or 0402 0R resistor. In normal operation jumper or resistor must be placed.
SW1 Push-button USB3.0 microcontroller reset button
J11 JTAG chain pin header FPGA programming pin header for Altera USB-Blaster download cable, 0.05” pitch
LEDS1 Red-green status LEDs User defined FPGA indication LED1 (near board edge if SMD; on the bottom if through-hole), User defined FPGA indication LED2 (farther board edge if SMD; on the top if through-hole)
LEDS2 Red-green status LEDs FX3 (USB) status indication LED (near board edge if SMD; on the bottom if through-hole), board power indication LED (farther board edge if SMD; on the top if through-hole)
General User Input/Output
J12 Pin header 8 FPGA GPIOs, 0.05” pitch
J13, J14 Pin header 3.3V fan connection pin headers, 0.1” and 0.05” pitch respectively
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