Lime-GPSDO v1.0 hardware description - Revision history

DovydasRusinskas: /* LimeSDR-Mini Board Architecture */

2021-02-04T08:48:55Z

LimeSDR-Mini Board Architecture

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	== LimeSDR-~~Mini~~ Board Architecture ==		== LimeSDR-GPSDO Board Architecture ==

2019-04-11T11:07:53Z

GPIO

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	Voltage for pin 10 of J12 connector can be 3.3V (default) or 5V. To connect this pin to 5V power rail remove R47 and solder R48 resistors (see Figure 5).		Voltage for pin 10 of J12 connector can be 3.3V (default) or 5V. To connect this pin to 5V power rail remove R47 and solder R48 resistors (see Figure 5).

			[[File:Figure 5 Power rail selection for pin 10 of J12 connector.png\|thumb\|center\|640px\|Figure 5 Power rail selection for pin 10 of J12 connector ]]

	=== Indication LEDs ===		=== Indication LEDs ===

2019-04-11T11:05:23Z

Board Overview

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	Board components description listed in the Table 1 ~~and Table 2~~.		Board components description listed in the Table 1.

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2019-04-11T11:04:06Z

Power Distribution

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	Lime-GPSDO board can be powered from USB port. In applications where USB power is insufficient board can be powered from external 5V power supply. External power supply can be fed to J14 barrel power connector by using power plug (1.35mm ID, 3.5mm OD) or pin header J13 (GND and VCC). Also there is an option to power up board from J8 GNSS USB pin header. External power supply connections has automatic source selection between USB and external source with polarity protection. <br><br>		Lime-GPSDO board can be powered from USB port. In applications where USB power is insufficient board can be powered from external 5V power supply. External power supply can be fed to J14 barrel power connector by using power plug (1.35mm ID, 3.5mm OD) or pin header J13 (GND and VCC). Also there is an option to power up board from J8 GNSS USB pin header. External power supply connections has automatic source selection between USB and external source with polarity protection. <br><br>
	Lime-GPSDO board power distribution block diagram is presented in Figure 10.		Lime-GPSDO board power distribution block diagram is presented in Figure 10.

			[[File:Figure 10 Lime-GPSDO board power distribution block diagram.png\|center\|thumb\|640px\|Figure 10 Lime-GPSDO board power distribution block diagram]]

2019-04-11T11:02:09Z

Clock Distribution

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	\|FPGA_CLK_OUT\|\|3.3V\|\|L3\|\|Clock output from FPGA, can be connected to J6 SMA connectors		\|FPGA_CLK_OUT\|\|3.3V\|\|L3\|\|Clock output from FPGA, can be connected to J6 SMA connectors
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			=== Power Distribution ===

			Lime-GPSDO board can be powered from USB port. In applications where USB power is insufficient board can be powered from external 5V power supply. External power supply can be fed to J14 barrel power connector by using power plug (1.35mm ID, 3.5mm OD) or pin header J13 (GND and VCC). Also there is an option to power up board from J8 GNSS USB pin header. External power supply connections has automatic source selection between USB and external source with polarity protection. <br><br>
			Lime-GPSDO board power distribution block diagram is presented in Figure 10.

2019-04-11T11:01:11Z

Clock Distribution

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	J6 SMA connector source can be changed from IC1 clock buffer (default configuration) to FPGA (IC6) clock output by removing R12 and fitting R14 resistors. Refer to Figure 9.		J6 SMA connector source can be changed from IC1 clock buffer (default configuration) to FPGA (IC6) clock output by removing R12 and fitting R14 resistors. Refer to Figure 9.
	[[File:Figure 9 SMA connector J6 source selection.png\|center\|thumb\|640px\|Figure 9 SMA connector J6 source selection]]		[[File:Figure 9 SMA connector J6 source selection.png\|center\|thumb\|640px\|Figure 9 SMA connector J6 source selection]]

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			\|+ Table 8. Lime-GPSDO clock pins
			! Source !! Schematic signal name !! I/O standard !! FPGA pin !! Description
			\|-
			\| rowspan="3" \| Clock buffer (IC1)\|\|CLK0_OUT\|\|3.3V\|\|H6\|\|30.72 MHz
			\|-
			\|CLK1_OUT\|\|3.3V\|\|-\|\|Connected to J5 SMA connector
			\|-
			\|CLK2_OUT\|\|3.3V\|\|-\|\|Connected to J6 SMA connector
			\|-
			\|GNSS module IC5\|\|GNSS_TPULSE\|\|3.3V\|\|A2\|\|1PPS time pulse output
			\|-
			\|Oscillator (XO2)\|\|CLK50_FPGA\|\|3.3V\|\|H4\|\|50MHz clock source s
			\|-
			\| rowspan="2" \| FPGA (IC6)\|\|FPGA_TPULSE\|\|3.3V\|\|C2\|\|FPGA 1PPS time pulse output connected to J3
			\|-
			\|FPGA_CLK_OUT\|\|3.3V\|\|L3\|\|Clock output from FPGA, can be connected to J6 SMA connectors
			\|}

2019-04-11T10:53:58Z

Temperature sensor

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	\|+ Table 8. Temperature sensor pins		\|+ Table 7. Temperature sensor pins
	! Schematic signal name !! FPGA pin !! I/O standard !! Comment		! Schematic signal name !! FPGA pin !! I/O standard !! Comment
	\|-		\|-

2019-04-11T10:53:44Z

Communication interfaces

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	\|+ Table 7. Communication interface pins		\|+ Table 6. Communication interface pins
	! Schematic signal name !! FPGA pin !! I/O standard !! Comment		! Schematic signal name !! FPGA pin !! I/O standard !! Comment
	\|-		\|-

2019-04-11T10:53:19Z

Indication LEDs

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	\|+ Table 5. Default LEDs functions		\|+ Table 4. Default LEDs functions
	! Board Reference !! Schematic signal name !! Board label !! FPGA pin !! Description		! Board Reference !! Schematic signal name !! Board label !! FPGA pin !! Description
	\|-		\|-
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	\|\|-\|\|-		\|\|-\|\|-
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	=== Switch and push button ===		=== Switch and push button ===

2019-04-11T10:52:59Z

GPIO

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	=== GPIO ===		=== GPIO ===

	There are eight general purpose input/output pins from FPGA connected to FPGA GPIO header (J12). Schematic names and pin connections can be found in Table 4.		There are eight general purpose input/output pins from FPGA connected to FPGA GPIO header (J12). Schematic names and pin connections can be found in Table 3.

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