LimeMicro:LMS6002D Programming and Calibration

Description
The functionality of the LMS6002 transceiver is fully controlled by a set of internal registers which can be accessed through a serial port interface. Both write and read operations are supported. The serial port can be configured to run in 3 or 4 wire mode with the following pins used:


 * SEN - serial port enable, active low
 * SCLK - serial clock
 * SDIO - serial data in/out in 3 wire mode, serial data input in 4 wire mode
 * SDO-serial data out in 4 wire mode, don’t care in 3 wire mode

Serial port key features:
 * 16 serial clock cycles are required to complete write operation
 * 16 serial clock cycles are required to complete read operation
 * Multiple write/read operations are possible without toggling serial enable signal

All configuration registers are 8-bit wide. Write/read sequence consists of 8-bit instruction followed by 8-bit data to write or read. The MSB of the instruction bit stream is used as SPI command, where CMD = 1 for write and CMD = 0 for read. Next 3 bits represent the block address, since LMS6002 configuration registers are divided into eight logical blocks as shown in the LMS6002Dr2 Memory Map. The remaining 4 bits of the instruction are used to address particular registers within the block as detailed in the Memory Map Description. Use address values from the tables.

Write/read cycle waveforms are shown below. Note that write operation is the same for both 3-wire and 4-wire modes. Although not shown in the figures, multiple byte write/read is possible by repeating instruction/data sequence while keeping SEN low.

TX/RX PLL Configuration (User Mode)

 * Shadow registered

TX RF Modules Configuration (User Mode)
{| class="wikitable" ! Address (7 bits) !! Bits !! Description
 * rowspan="3"|0x40 || 7-2 || Not used.
 * 1 || EN : TXRF modules enable
 * 0 – TXRF modules powered down.
 * 1 – TXRF modules enabled. (Default)
 * 0 || DECODE:
 * 0 – Decode control signals. (Default)
 * 1 – Use control signals from test mode registers.
 * rowspan="3"|0x41 || 7-5 || Not used.
 * 4-0 || VGA1GAIN[4:0]: TXVGA1 gain, log-linear control. LSB=1dB, encoded as shown below.
 * || Default: 00010101
 * rowspan="2"|0x42 || 7-0 || VGA1DC_I[7:0]: TXVGA1 DC shift control, LO leakage cancellation. LSB=0.0625mV, encoded as shown below.
 * || Default: 10000000
 * rowspan="2"|0x43 || 7-0 || VGA1DC_Q[7:0]: TXVGA1 DC shift control, LO leakage cancellation LSB=0.0625mV, encoded as shown below.
 * 4-0 || VGA1GAIN[4:0]: TXVGA1 gain, log-linear control. LSB=1dB, encoded as shown below.
 * || Default: 00010101
 * rowspan="2"|0x42 || 7-0 || VGA1DC_I[7:0]: TXVGA1 DC shift control, LO leakage cancellation. LSB=0.0625mV, encoded as shown below.
 * || Default: 10000000
 * rowspan="2"|0x43 || 7-0 || VGA1DC_Q[7:0]: TXVGA1 DC shift control, LO leakage cancellation LSB=0.0625mV, encoded as shown below.
 * || Default: 10000000
 * rowspan="2"|0x43 || 7-0 || VGA1DC_Q[7:0]: TXVGA1 DC shift control, LO leakage cancellation LSB=0.0625mV, encoded as shown below.
 * rowspan="2"|0x43 || 7-0 || VGA1DC_Q[7:0]: TXVGA1 DC shift control, LO leakage cancellation LSB=0.0625mV, encoded as shown below.
 * rowspan="2"|0x43 || 7-0 || VGA1DC_Q[7:0]: TXVGA1 DC shift control, LO leakage cancellation LSB=0.0625mV, encoded as shown below.


 * || Default: 10000000
 * rowspan="5"|0x44 || 7-5 || Not used.
 * 4-3 || PA_EN[2:0]: VGA2 power amplifier (TX output) selection.
 * 2 || PA_EN[2]: AUXPA, auxiliary (RF loopack) PA power down.
 * 0 – Powered up. (Default)
 * 1 – Powered down.
 * 1-0 || Not used.
 * || Default: 00001011
 * rowspan="3"|0x45 || 7-3 || VGA2GAIN[4:0]: TXVGA2 gain control, log-linear control. LSB=1dB, encoded as shown below.
 * 2-0 || ENVD[2:0]: Controls envelop/peak detector analogue MUX.
 * ENVD[2]: Selects the signal for AC coupling, MUX provides:
 * 0 – Reference DC generated inside the selected detector. (Default)
 * 1 – Average of the selected detector output.
 * ENVD[1:0]: Detector select, MUX provides
 * 00 – AUXPA envelop detector output (Default)
 * 01 – AUXPA peak detector output.
 * 10 – PA1 envelop detector output.
 * 11 – PA2 envelop detector output.
 * || Default: 00000000
 * rowspan="5"|0x46 || 7-4 || PKDBW[3:0]: Controls the bandwidth of the envelop and peak detectors.
 * 0000 – Minimum bandwidth, envelop ~1MHz, peak 30kHz. (Default)
 * 1111 – Maximum bandwidth, envelop ~15MHz, peak ~300KHz.
 * 3-2 || LOOPBBEN[1:0]: Base band loopback switches control.
 * 00 – Switch open. (Default)
 * 11 – Switch closed.
 * 1 || FST_PKDET: Shorts the resistor in the envelop/peak detector to speed up charging for faster response. After the initial charge up, it should be disabled to achieve a LPF function.
 * 0 – Switch open, LPF function in effect. (Default)
 * 1 – Resistor shorted (no LPF function).
 * 0 || FST_TXHFBIAS: Bias stage of high frequency TX part has large resistors to filter the noise. However, they create large settling time. This switch can be used to short those resistors during the initialization and then it may be needed to open it to filter the noise, in case the noise is too high.
 * 0 – Switch open (noise filtering functional). (Default)
 * 1 – Resistors shorted (short settling - no noise filtering).
 * || Default: 00000000
 * rowspan="3"|0x47 || 7-4 || ICT_TXLOBUF[3:0]: Controls the bias current of the LO buffer. Higher current will increase the linearity. LSB=5/6mA.
 * 0000 – Minimum current.
 * 0110 – TXMIX takes 5mA for buffer. (Default)
 * 1111 – Maximum current.
 * 3-0 || VBCAS_TXDRV[3:0]: The linearity of PAs depends on the bias at the base of the cascode NPNs in the PA cells. Increasing the VBCAS will lower the base of the cascode NPN.
 * 0000 – Maximum base voltage. (Default)
 * 1111 – Minimum base voltage.
 * || Default: 01100000
 * rowspan="3"|0x48 || 7-5 || Not used.
 * 4-0 || ICT_TXMIX[4:0]: Controls the bias current of the mixer. Higher current will increase the linearity. LSB=1mA.
 * 00000 – 0mA.
 * 01100 – TXMIX takes 12mA for each cell. (Default)
 * 11111 – 31mA.
 * || Default: 00001100
 * rowspan="3"|0x49 || 7-5 || Not used.
 * 4-0 || ICT_TXDRV[4:0]: Controls the bias current of the PAs. Higher current will increase the linearity. LSB=1mA.
 * 00000 – 0mA.
 * 01100 – PAs take 12mA for each cell. (Default)
 * 11111 – 31mA.
 * || Default: 00001100
 * }
 * 0000 – Maximum base voltage. (Default)
 * 1111 – Minimum base voltage.
 * || Default: 01100000
 * rowspan="3"|0x48 || 7-5 || Not used.
 * 4-0 || ICT_TXMIX[4:0]: Controls the bias current of the mixer. Higher current will increase the linearity. LSB=1mA.
 * 00000 – 0mA.
 * 01100 – TXMIX takes 12mA for each cell. (Default)
 * 11111 – 31mA.
 * || Default: 00001100
 * rowspan="3"|0x49 || 7-5 || Not used.
 * 4-0 || ICT_TXDRV[4:0]: Controls the bias current of the PAs. Higher current will increase the linearity. LSB=1mA.
 * 00000 – 0mA.
 * 01100 – PAs take 12mA for each cell. (Default)
 * 11111 – 31mA.
 * || Default: 00001100
 * }
 * 4-0 || ICT_TXDRV[4:0]: Controls the bias current of the PAs. Higher current will increase the linearity. LSB=1mA.
 * 00000 – 0mA.
 * 01100 – PAs take 12mA for each cell. (Default)
 * 11111 – 31mA.
 * || Default: 00001100
 * }
 * }