Zipper Interface Board

Democratising Wireless Innovation
Revision as of 17:09, 13 July 2015 by Ghalfacree (talk | contribs) (Initial page creation.)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search
The printable version is no longer supported and may have rendering errors. Please update your browser bookmarks and please use the default browser print function instead.

About

The Zipper Interface Board is designed to allow any Field-Programmable Gate Array (FPGA) development system supporting the High-Speed Mezzanine Card (HSMC) or FPGA Mezzanine Card (FMC) standards to be connected to the Myriad-RF1 to form the Reference Development Kit. The combination of the Zipper and Myriad-RF 1 boards provides a low-cost universal radio development platform, based on the flexible, multi-standard Field Programmable Radio Frequency (FPRF) LMS6002D device. It enables developers to implement their products for a wide variety of wireless communication applications efficiently.

Images

  • Zipper Interface Board, top

    Zipper Interface Board, top

  • Zipper Interface Board block diagram

    Zipper Interface Board block diagram

Connections

The Zipper Interface Board features numerous on-board connections, in addition to those available on the Myriad-RF 1 itself. A full list of available connections is available on the page Zipper Interface Board Connections.

Schematics

Full schematics for the Myriad-RF 1 board can be accessed on the Reference Development Kit GitHub Repository in PDF format.

See Also

Retrieved from "http://wiki.myriadrf.org/index.php?title=Zipper_Interface_Board&oldid=105"