LimeNET-Micro v2.1 hardware description

Democratising Wireless Innovation
Revision as of 15:48, 19 March 2019 by RicardasGarmus (talk | contribs) (Created page with "== LimeNET-Micro Board Key Features == LimeNET Micro makes deploying wireless networks more accessible than ever before, by extending the LimeNET line of integrated hardware...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search

LimeNET-Micro Board Key Features

LimeNET Micro makes deploying wireless networks more accessible than ever before, by extending the LimeNET line of integrated hardware solutions via an ultra-low cost platform that is capable of supporting narrowband systems, such as GSM and IoT wireless standards, in a stand-alone configuration.

File:TBD.png
Figure 1. LimeSDR-Micro v2.1


LimeNET-Micro board features:

  • RF transceiver
    • Lime Microsystems LMS7002M
  • Raspberry Pi
    • DDR2 SODIMM socket for raspberry Pi CM3(L)
    • 2x downstream USB 2.0 ports
    • Upstream Micro-USB for USB boot of Compute Module
    • 3.5mm analog audio, composite video output
    • Ethernet + active PoE (RJ45) connector
    • Ribbon cable camera and display connectors
    • HDMI connector
    • External UART connector
    • uSD card slot
    • USB2.0 HUB and 10/100 Ethernet controller
    • SDIO Wi-Fi module
    • Jumper for Raspberry boot mode selection
  • FPGA Features
    • Intel MAX10 10M16SAU169C8 device in 169-pin UBGA
    • 16K logic elements
    • 549 Kbits embedded memory (M9K) and 2368 Kbits of user Flash Memory
    • 45 embedded 18x18 multipliers
    • 1 PLLs
  • FPGA Configuration
    • JTAG mode configuration
  • USB Controller
    • FTDI FT601 USB to FIFO interface bridge chip (connects FPGA to USB2.0 HUB)
  • Memory Devices
    • 4Mbit FLASH (for FPGA data)
    • 2x 128Kbit (16K x 8) EEPROM (for LMS MCU firmware and FPGA data)
  • Other Devices
    • Temperature sensor
    • Crypto Authentication Device
    • GNSS receiver
  • Connections
    • 2 x coaxial RF (SMA) connectors
    • SMA connectors for reference clock IN/OUT, GNSS and Wi-Fi antennas
    • 5V DC power jack
    • 5V header for powering external devices
    • Fan header
    • FPGA JTAG connectors (0.05” pitch and side connector)
    • Backup battery connector for GNSS receiver
  • Clock System
    • 30.72MHz VCOCXO:
      • Frequency calibration ±0.5ppm;
      • Frequency stability over temperature in still air ±20ppb;
      • Frequency slope ΔF/ΔT in still air ±1.2ppb/°C
    • Possibility to tune VCOCXO by onboard DAC
    • Possibility to use GNSS PPS signal as a reference when tuning VCOCXO frequency
  • User I/O
    • GPIO header (0.05” pitch) connected to FPGA
    • 5X dual color (RG) LEDs connected to FPGA
    • Push button connected to FPGA
    • Buzzer connected to FPGA
  • Board Size: without connectors 125mm x 65mm (4.92” x 2.56”)


For more information on the following topics, refer to the respective documents:

  • FT601 controller resources [link]
  • MAX10 device family, refer to Intel documentation [link]
  • LMS7002M transceiver resources [link]