DE0-Nano Interface Board Connections

Democratising Wireless Innovation
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DE0-Nano Interface Board Connections

DE0-Nano Interface Board with connections labelled
DE0-Nano Interface Board with connections labelled

The following table describes the pin assignment for each connector on the digital interface board:

Connector Name Description
J1 RF PWR Optional +5 V power supply for the Myriad-RF 1 board.
J2 Digital I/O The FX10A-80P is a standard connector used to interface the Myriad-RF board directly to a base band board.
J3 FPGA PWR Optional +5 V power supply for the FPGA module.
J4 Mini-USB Port used to connect to USB microcontroller.
J5 EEPROM Boot Enables memory access for USB microcontroller.
J6 CLK Output Used to synchronise measurement equipment. Clock output is generated with onboard frequency synthesiser.
J7 Frequency Synthesiser Enable Programmable synthesiser operation control. Enables synthesiser outputs.
J8 Main Power Supply +5 V power supply feed for digital interface board as well as Myriad-RF 1 board. Connector type SPC4077.
J9 Main Power Supply +5 V power supply feed for digital interface board as well as Myriad-RF 1 board. Connector type two-way pin header.
JA1 FPGA Module Connectors Array The connector array designed to plug a DE0-Nano FPGA Development System onto the interface board.

J1 and J3 - +5 V Power Connectors

These pin header type connectors used as jumpers to supply +5 V for the Myriad-RF 1 board and DE0-Nano FPGA module. The options are used as shown below:

  • Use jumper on J1 if Myriad-RF 1 is to receive power from the interface board.
  • Use jumper on J3 if DE0-Nano power is supplied from the interface board.

J2 - Digital I/O Connector

The Myriad-RF board is directly plugged into the J2 connector. The digital I/O connector is a digital transmit (TX) and receive (RX) interface to the ADC/DAC of the LMS6002D. The SPI interface for LMS6002DFN can also be established via J2 connector.

DE0-Nano Interface Board J2
DE0-Nano Interface Board J2


J4 - Mini-USB Connector

The interface with USB microcontroller and PC is established via mini USB connector. This connector also powers the microcontroller.

DE0-Nano Interface Board J4
DE0-Nano Interface Board J4

J5 - EEPROM Boot Memory Connector

This connector enables the USB microcontroller to load the firmware at startup.

J6 - CLK Output Connector

J6 is an SMA type connector, used to synchronise measurement equipment with the development kit.

DE0-Nano Interface Board J6
DE0-Nano Interface Board J6

J7 - Frequency Synthesiser Enable Connector

J7 is a pin-header type connector. Pin 3 and Pin 4 have to be shorted in normal operation, thus enabling frequency synthesiser outputs.

DE0-Nano Interface Board J7
DE0-Nano Interface Board J7

J8 and J9 - Main Power Supply Connectors

The main power supply connector is on the interace board, providing power to both the interface as well as the Myriad-RF 1 board.

DE0-Nano Interface Board J8 & J9
DE0-Nano Interface Board J8 & J9

JA1 - FPGA Module Connectors Array

JA1 is a connection array for the DEO-Nano FPGA Development System. Physically, there are two separate connectors on the board. This connector establishes the interface between the Myriad-RF 1 board's digital interface and FPGA module with the PC.

DE0-Nano Interface Board JA1
DE0-Nano Interface Board JA1

Hardware Options

The board is shipped in a default mode for basic operation. Various options are available depending on the system configuration required for testing or development work. The options are summarised below and the following sections describe the board modifications required to achieve these configurations.

Reference Frequency and Data Clocks Distribution

The LMS6002D device provides a flexible clocking scheme which enables the PLL clock, RX clock and TX clock to be independently set. The development kit is shipped with a default mode using the on board 30.72 MHz clock for PLL clock only. The board can be reconfigured to allow users to provide clock frequency for digital interface and PLL clock using programmable clock generator from Silicon Labs (Si5356) which is capable of synthesising four independent frequencies. The device has four outputs connected to the LMS6002DFN PLL clock, RX data interface clock, TX data interface clock and to the J6 connector. In order to reprogram the frequency from the default setting of 30.72 MHz, please use component change as given in the table below. Please note that NF denotes that component is not fitted:

Reference Clock Options
Component Default Mode - PLL Clock set to 30.72 MHz Programmable Mode - PLL Clock Can be Reprogrammed
R15 0 Ohm NF
R24 NF 0 Ohm

SPI Options

The Myriad-RF 1 board offers two options for SPI communications: SPI communication is established via the FPGA and USB microcontroller located on the interface board; or SPI communication is established via the Myriad-RF 1's own USB microcontroller. In order to ensure stable SPI communication for your chosen option, the interface board may require a component change. Please note that NF denotes that component is not fitted:

SPI Options
Components SPI via FPGA SPI via USB controller
R48 NF 0 Ohm
R58 NF 0 Ohm
R51 NF 0 Ohm
R46 NF 0 Ohm
R52 NF 0 Ohm

GPIO Control Truth Table

The RF switches on the RF board are controlled via the GPIO0-2 logic signals, provided by the FPGA module on the interface board. This enables the user to choose RF input/output depending on the operation frequency. The truth table of the GPIO0-2 settings is shown below:

LMS6002D RF Input/Output GPIO0 GPIO1 GPIO2 Description
TX Out 1 X X 0 High band output (1500 - 3800 MHz)
TX Out 2 X X 1 Broadband output
RX In 1 1 1 X Low band input (300 - 2200 MHz)
RX In 2 0 1 X High band input (1500 - 3800 MHz)
RX In 3 0 0 X Broadband input

See Also